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IXA University Education Summit

IXA University Education Summit 2005

Hudson Massachusetts, September 27-28

The Intel® IXA University team routinely gathers professors, students and Intel specialists once a year to review the work done by the program schools as well review the latest news from Intel. This year we held our conference in Hudson Massachusetts.  We brought in John Beck and Matt Adiletta to deliver keynote speeches. John and Matt are co-managers of the Communications Infrastructure Architecture and Planning (CIAP) organization. Below is a brief overview of the Conference. We have also attached links to the University presentations made.


Opening Remarks: Bapi Vinnakota - CIAP Architect, Intel

This year we had an exciting agenda. Bapi Vinnakota started off the day providing an overview of the two day conference and opening remarks.  During the introductions, participants described their areas of research. Participants hailed from  Canada, Switzerland, The Netherlands, China, Japan, Malaysia, and the United States.


Keynote Speaker: John Beck - CIAP Planning Director, Intel

John gave a keynote presentation that covered a brief program history, the convergence of compute and communications, and opportunities for the University Program in 2006. Participants were happy to know that Intel will continue supporting this program and value the work of the universities.

 


Keynote Speaker: Matt Adiletta- Intel Fellow, IXA Chief Software Architect, Intel

For the second year in a row we were treated to a keynote presentation by Matt Adiletta.  Matt gave a compelling and interesting talk highlighting the future direction of Intel’s network processors.  His talks are interactive and audience participation is encouraged.  Like last year, Matt's presentation received high review scores from the conference attendees.


Snapshot of IXP University Research: Bapi Vinnakota, CIAP Architect, Intel

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Bapi worked closely with Ada Gavrilovska of Georgia Tech in putting together this presentation. It provided an overview of the types of research that are taking place at the Universities. The presentation concluded with an interactive discussion on increasing collaboration between universities.


IXP-C: Auto partitioning Compiler: Manohar R. Castelino, IPD Software Architect, Intel

Manohar provided an informative introduction to the Auto Partitioning C Compiler for the IXP2xxx line of network processors. The presentation provided an overview of the compiler, benchmark comparisons, language extensions, and compiler optimizations. The audience was excited about IXP-C and very anxious to begin using the compiler.


IXP2350 Hardware Architecture Technical Talk:  Vedvyas Shanbhogue, ISO Architect, Intel

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Vedvyas introduced the IXP2350 platform to the audience.  The IXP2350 combines the best of the the IXP425 and the IXP2400. The presentation included feature highlights, an architectural overview, microengine fundamentals, and description of a few IXP2350 applications.


Round Table Discussion: Curriculum Development Programs: Prof. Peter Steenkiste, Carnegie Mellon University

Professor Steenkiste chaired the round table discussion that included Patrick Crowley of Washington University, Ada Gavrilovska of Georgia Tech, and Tilman Wolf of University of Massachusetts -Amherst. Each professor presented an overview of their experience with teaching IXP based material. The presentation concluded with panel answering questions from the audience.


Network Intrusion Prevention on the Network Card: Prof. Herbert Bos, Vrije Universiteit

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Professor Bos provided an overview of their CardGuard research.  CardGuard is software based intrusion protection implemented on the NIC. The presentation included an introduction to CardGuard, description of architecture, the implementation, and preliminary results.

 

Herbert's presentation is available here.


Protocol Offloading Using An IXP2400 Network Processor: Prof. Yan Luo, University of Massachusetts Lowell

Professor Yan presented the research he participated in as graduate student while attending the University of California Riverside. He is now a faculty member of University of Massachusetts Lowell.  They have been working with Protocol Offloading using the IXP2400 Network Processor. The presentation included motivation, design goals and challenges, their implementation, performance evaluation, and a taste of ongoing research and teaching.

Yan's presentation is available here.


Implementing the Embedded CD++ Modeling Tool on the IXA Platform: Wei Ding, Carleton University

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Wei provided an overview of implementing Embedded CD++ on the IXA architecture.  Wei is a student supervised by Professor Gabriel A. Wainer working on this research. The presentation included the problem description, description of the CD++ tool and their experience porting the tool to IXP2400 architecture.

 

Wei's presentation is available here.


IXA SDK Update – What’s New, What’s Coming: Ihab Bishara, IXA Software Product Manager, Intel 

Ihab presented a technical review of the IXA Software Development Kit for the IXP2xxx family of network processors. Included in the discussion: benefits of the SDK, SDK components, roadmap, and the new features of the IXA SDK 4.3 GA release.


A General Framework for Measuring Performance of NP-Based Web Switches:  Prof. Jie Wang, University of Massachusetts Lowell

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Professor Wang presented their research on measuring performance of NP-Based web switches.  Jie covered the performance model, a performance analysis of a web switch, and their conclusions.

 

Jie's presentation is available here.


Efficient Data Manipulation Services on Server Platforms: Ada Gavrilovska Research Scientist/Instructor, Georgia Tech

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Professor Gavrilovska gave an informative presentation on efficient data manipulation services on server platforms. They are working with Delta Airlines, Worldspan, and Cisco in this area.  Their research involves: complex transformations of data for interoperability with external partners; data integration from multiple sources; distribution/specialization for multiple sinks; all with performance guarantees.  The presentation included performance comparisons between the application implemented on a PC and the performance of the application implemented on a number of the network processors.

 

Ada's presentation is available here.


JackHMMer: Exploiting Coarse Grained Parallelism to Accelerate Protein Motif Finding with a Network Processor: Prof. Patrick Crowley, Washington University in St. Louis

Professor Crowley presented an overview of a novel research project underway at Washington University. They are using network processors to accelerate protein motif searches.  The presentation included an introduction to HMMr, their port of HMMr to the IXP, and performance comparisons of the application implemented on the IXP vs. the application implemented on the NP.

Patrick's presentation is available here.

 


Wireless Multimedia and the Digital Home: Dave Romano, IPD Architect, Intel 

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David provided an entertaining and informative presentation on wireless multimedia and the digital home. He began with an overview of the digital home, displaying some of the products that are currently available in this space.  The remainder of his presentation dealt with challenges that are faced and the standards that have been developed to meet these challenges.


IXP425 From Lab to Home: Tian Tian, IPD Technical Marketing Engineer, Intel

Tian introduced the IXP425 development platform to the audience. He began the presentation with an overview of the hardware and software.  Next Tian described typical usages of the IXP425 in applications such as firewalls, VoIP, VPNs, and Wireless access points. He followed this with some novel usages of the IXP425 in appliances like a DVD download & player and wireless TV reference design. Tian concluded the presentation with discussion of using the IXP425 as an education tool. 

 


In addition to the presentations, we allotted a significant amount of time both days of the conference for Q&A with IXP experts from Intel.   Many questions were asked relating to the program and the development tools. Special thanks to the Intel engineers who were present to field questions from the audience.

 

We look forward to seeing you again next year!